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? semiconductor components industries, llc, 2007 february, 2007 ? rev. 9 1 publication order number: uc3842b/d uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv high performance current mode controllers the uc3842b, uc3843b series are high performance fixed frequency current mode controllers. they are specifically designed for off?line and dc?dc converter applications offering the designer a cost?effective solution with minimal external components. these integrated circuits feature a trimmed oscillator for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totem pole output ideally suited for driving a power mosfet. also included are protective features consisting of input and reference undervoltage lockouts each with hysteresis, cycle?by?cycle current limiting, programmable output deadtime, and a latch for single pulse metering. these devices are available in an 8?pin dual?in?line and surface mount (soic?8) plastic package as well as the 14?pin plastic surface mount (soic?14). the soic?14 package has separate power and ground pins for the totem pole output stage. the ucx842b has uvlo thresholds of 16 v (on) and 10 v (off), ideally suited for off?line converters. the ucx843b is tailored for lower voltage applications having uvlo thresholds of 8.5 v (on) and 7.6 v (off). features ? trimmed oscillator for precise frequency control ? oscillator frequency guaranteed at 250 khz ? current mode operation to 500 khz ? automatic feed forward compensation ? latching pwm for cycle?by?cycle current limiting ? internally trimmed reference with undervoltage lockout ? high current totem pole output ? undervoltage lockout with hysteresis ? low startup and operating current ? pb?free packages are available figure 1. simplified block diagram 5.0v reference latching pwm v cc undervoltage lockout oscillator error amplifier 7(12) v c 7(11) output 6(10) power ground 5(8) 3(5) current sense input v ref 8(14) 4(7) 2(3) 1(1) gnd 5(9) r t /c t voltage feedback input r r + ? v ref undervoltage lockout output compensation pin numbers in parenthesis are for the d suffix soic?14 package. v cc 14 soic?14 d suffix case 751a 1 see detailed ordering and shipping information in the package dimensions section on page 17 of this data sheet. ordering information see general marking information in the device marking section on page 19 of this data sheet. device marking information 1 8 pdip?8 n suffix case 626 pin connections compensation nc voltage feedback nc current sense nc r t /c t compensation voltage feedback current sense r t /c t v ref v ref nc v cc v c output gnd power ground v cc output gnd (top view) 8 7 6 5 1 2 3 4 1 2 3 4 14 13 12 11 5 6 7 10 9 8 (top view) soic?8 d1 suffix case 751 1 8 http://onsemi.com
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 2 maximum ratings rating symbol value unit bias and driver voltages (zero series impedance, see also total device spec) v cc , v c 30 v total power supply and zener current (i cc + i z ) 30 ma output current, source or sink i o 1.0 a output energy (capacitive load per cycle) w 5.0 j current sense and voltage feedback inputs v in ? 0.3 to + 5.5 v error amp output sink current i o 10 ma power dissipation and thermal characteristics d suffix, plastic package, soic?14 case 751a maximum power dissipation @ t a = 25 c thermal resistance, junction?to?air d1 suffix, plastic package, soic?8 case 751 maximum power dissipation @ t a = 25 c thermal resistance, junction?to?air n suffix, plastic package, case 626 maximum power dissipation @ t a = 25 c thermal resistance, junction?to?air p d r ja p d r ja p d r ja 862 145 702 178 1.25 100 mw c/w mw c/w w c/w operating junction temperature t j +150 c operating ambient temperature uc3842b, uc3843b uc2842b, uc2843b uc3842bv, uc3843bv ncv3843bv t a 0 to 70 ? 25 to + 85 ?40 to +105 ?40 to +125 c storage temperature range t stg ? 65 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 3 electrical characteristics (v cc = 15 v [note 1], r t = 10 k, c t = 3.3 nf. for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies [note 2], unless otherwise noted.) uc284xb uc384xb, xbv characteristics symbol min typ max min typ max unit reference section reference output voltage (i o = 1.0 ma, t j = 25 c) v ref 4.95 5.0 5.05 4.9 5.0 5.1 v line regulation (v cc = 12 v to 25 v) reg line ? 2.0 20 ? 2.0 20 mv load regulation (i o = 1.0 ma to 20 ma) reg load ? 3.0 25 ? 3.0 25 mv temperature stability t s ? 0.2 ? ? 0.2 ? mv/ c total output variation over line, load, and temperature v ref 4.9 ? 5.1 4.82 ? 5.18 v output noise voltage (f = 10 hz to 10 khz, t j = 25 c) v n ? 50 ? ? 50 ? v long term stability (t a = 125 c for 1000 hours) s ? 5.0 ? ? 5.0 ? mv output short circuit current i sc ?30 ?85 ?180 ?30 ?85 ?180 ma oscillator section frequency t j = 25 c t a = t low to t high t j = 25 c (r t = 6.2 k, c t = 1.0 nf) f osc 49 48 225 52 ? 250 55 56 275 49 48 225 52 ? 250 55 56 275 khz frequency change with voltage (v cc = 12 v to 25 v) f osc / v ? 0.2 1.0 ? 0.2 1.0 % frequency change with temperature, t a = t low to t high f osc / t ? 1.0 ? ? 0.5 ? % oscillator voltage swing (peak?to?peak) v osc ? 1.6 ? ? 1.6 ? v discharge current (v osc = 2.0 v) t j = 25 c, t a = t low to t high uc284xb, uc384xb t a = t low to t high uc384xbv i dischg 7.8 7.5 ? 8.3 ? ? 8.8 8.8 ? 7.8 7.6 7.2 8.3 ? ? 8.8 8.8 8.8 ma error amplifier section voltage feedback input (v o = 2.5 v) v fb 2.45 2.5 2.55 2.42 2.5 2.58 v input bias current (v fb = 5.0 v) i ib ? ? 0.1 ?1.0 ? ? 0.1 ? 2.0 a open loop voltage gain (v o = 2.0 v to 4.0 v) a vol 65 90 ? 65 90 ? db unity gain bandwidth (t j = 25 c) bw 0.7 1.0 ? 0.7 1.0 ? mhz power supply rejection ratio (v cc = 12 v to 25 v) psrr 60 70 ? 60 70 ? db output current sink (v o = 1.1 v, v fb = 2.7 v) source (v o = 5.0 v, v fb = 2.3 v) i sink i source 2.0 ? 0.5 12 ?1.0 ? ? 2.0 ? 0.5 12 ?1.0 ? ? ma output voltage swing high state (r l = 15 k to ground, v fb = 2.3 v) low state (r l = 15 k to v ref , v fb = 2.7 v) uc284xb, uc384xb uc384xbv v oh v ol 5.0 ? ? 6.2 0.8 ? ? 1.1 ? 5.0 ? ? 6.2 0.8 0.8 ? 1.1 1.2 v current sense section current sense input voltage gain (notes 3 and 4) uc284xb, uc384xb uc384xbv a v 2.85 ? 3.0 ? 3.15 ? 2.85 2.85 3.0 3.0 3.15 3.25 v/v maximum current sense input threshold (note 3) uc284xb, uc384xb uc384xbv v th 0.9 ? 1.0 ? 1.1 ? 0.9 0.85 1.0 1.0 1.1 1.1 v power supply rejection ratio (v cc = 12 v to 25 v, note 3) psrr ? 70 ? ? 70 ? db input bias current i ib ? ? 2.0 ?10 ? ? 2.0 ?10 a propagation delay (current sense input to output) t plh(in/out) ? 150 300 ? 150 300 ns 1. adjust v cc above the startup threshold before setting to 15 v. 2. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. t low = 0 c for uc3842b, uc3843b; ?25 c for uc2842b, uc2843b; ?40 c for uc3842bv, uc3843bv t high = +70 c for uc3842b, uc3843b; +85 c for uc2842b, uc2843b; +105 c for uc3842bv, uc3843bv ncv3843bv: t low = ?40 c, t high = +105 c. guaranteed by design. ncv prefix is for automotive and other applications requiring site and change control. 3. this parameter is measured at the latch trip point with v fb = 0 v. 4. comparator gain is defined as: a v v output compensation v current sense input
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 4 electrical characteristics (v cc = 15 v [note 5], r t = 10 k, c t = 3.3 nf. for typical values t a = 25 c, for min/max values t a is the operating ambient temperature range that applies [note 6], unless otherwise noted.) uc284xb uc384xb, xbv characteristics symbol min typ max min typ max unit output section output voltage low state (i sink = 20 ma) (i sink = 200 ma) uc284xb, uc384xb uc384xbv high state (i source = 20 ma) uc284xb, uc384xb uc384xbv (i source = 200 ma) v ol v oh ? ? ? 13 ? 12 0.1 1.6 ? 13.5 ? 13.4 0.4 2.2 ? ? ? ? ? ? ? 13 12.9 12 0.1 1.6 1.6 13.5 13.5 13.4 0.4 2.2 2.3 ? ? ? v output voltage with uvlo activated (v cc = 6.0 v, i sink = 1.0 ma) v ol(uvlo) ? 0.1 1.1 ? 0.1 1.1 v output voltage rise time (c l = 1.0 nf, t j = 25 c) t r ? 50 150 ? 50 150 ns output voltage fall time (c l = 1.0 nf, t j = 25 c) t f ? 50 150 ? 50 150 ns undervoltage lockout section startup threshold (v cc ) ucx842b, bv ucx843b, bv v th 15 7.8 16 8.4 17 9.0 14.5 7.8 16 8.4 17.5 9.0 v minimum operating voltage after turn?on (v cc ) ucx842b, bv ucx843b, bv v cc(min) 9.0 7.0 10 7.6 11 8.2 8.5 7.0 10 7.6 11.5 8.2 v pwm section duty cycle maximum uc284xb, uc384xb maximum uc384xbv minimum dc (max) dc (min) 94 ? ? 96 ? ? ? ? 0 94 93 ? 96 96 ? ? ? 0 % total device power supply current startup (v cc = 6.5 v for ucx843b, startup v cc 14 v for ucx842b, bv) (note 5) i cc + i c ? ? 0.3 12 0.5 17 ? ? 0.3 12 0.5 17 ma power supply zener voltage (i cc = 25 ma) v z 30 36 ? 30 36 ? v 5. adjust v cc above the startup threshold before setting to 15 v. 6. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. t low = 0 c for uc3842b, uc3843b; ?25 c for uc2842b, uc2843b; ?40 c for uc3842bv, uc3843bv t high = +70 c for uc3842b, uc3843b; +85 c for uc2842b, uc2843b; +105 c for uc3842bv, uc3843bv ncv3843bv: t low = ?40 c, t high = +125 c. guaranteed by design. ncv prefix is for automotive and other applications requiring site and change control.
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 5 0.8 2.0 5.0 8.0 20 50 80 r t , timing resistor (k ) 1.0 m 500 k 200 k 100 k 50 k 20 k 10 k f osc , oscillator frequency (khz) v cc = 15 v t a = 25 c figure 2. timing resistor versus oscillator frequency figure 3. output deadtime versus oscillator frequency 1.0 m 500 k 200 k 100 k 50 k 20 k 10 k f osc , oscillator frequency (khz) 1.0 2.0 5.0 10 20 50 100 % dt, percent output deadtime 1 2 figure 4. oscillator discharge current versus temperature figure 5. maximum output duty cycle versus timing resistor , discharge current (ma) 7.0 ?55 t a , ambient temperature ( c) ?25 0 25 50 75 100 125 dischg i 7.5 8.0 8.5 9.0 v cc = 15 v v osc = 2.0 v , maximum output duty cycle (%) max d 40 0.8 r t , timing resistor (k ) 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 50 60 70 80 90 100 i dischg = 7.5 ma v cc = 15 v c t = 3.3 nf t a = 25 c 1. c t = 10 nf 2. c t = 5.0 nf 3. c t = 2.0 nf 4. c t = 1.0 nf 5. c t = 500 pf 6. c t = 200 pf 7. c t = 100 pf 5 i dischg = 8.8 ma 7 3 6 4 v cc = 15 v t a = 25 c figure 6. error amp small signal transient response figure 7. error amp large signal transient response 1.0 s/div 0.5 s/div 20 mv/div 20 mv/div 2.55 v 2.50 v 2.45 v 3.0 v 2.5 v 2.0 v v cc = 15 v a v = ?1.0 t a = 25 c v cc = 15 v a v = ?1.0 t a = 25 c where: vosc = 1.7 v i rt = vref/rt idis = 8.3 ma freq 1 ct vosc i rt ct vosc idis i rt
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 6
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 7 figure 8. error amp open loop gain and phase versus frequency figure 9. current sense input threshold versus error amp output voltage figure 10. reference voltage change versus source current figure 11. reference short circuit current versus temperature ?20 a vol , open loop voltage gain (db) 10 m 10 f, frequency (hz) gain phase v cc = 15 v v o = 2.0 v to 4.0 v r l = 100 k t a = 25 c 0 30 60 90 120 150 180 100 1.0 k 10 k 100 k 1.0 m 0 20 40 60 80 100 , excess phase (degrees) 0 v o , error amp output voltage (v) 0 , current sense input threshold (v ) v th 0.2 0.4 0.6 0.8 1.0 1.2 2.0 4.0 6.0 8.0 v cc = 15 v t a = 25 c t a = ?55 c t a = 125 c ???? ??? ??? c ???? ???? c , reference voltage change (mv) ?16 0 i ref , reference source current (ma) 20 40 60 80 100 120 ref v ?12 ?8.0 ?4.0 0 ?20 ?24 ???? c ???? ???? 0.1 , reference short circuit current (ma) sc i 50 ?55 t a , ambient temperature ( c) ?25 0 25 50 75 100 125 70 90 110 figure 12. reference load regulation figure 13. reference line regulation 2.0 ms/div 2.0 ms/div v cc = 15 v i o = 1.0 ma to 20 ma t a = 25 c v cc = 12 v to 25 t a = 25 c , output voltage change (2.0 mv/div) v o , output voltage change (2.0 mv/div) v o
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 8 ???? ???? sink saturation (load to v cc ) ???? ???? c ??? ????? ????? ??? ??? c figure 14. output saturation voltage versus load current figure 15. output waveform figure 16. output cross conduction figure 17. supply current versus supply voltag e ??? ??? t a = 25 c ???? ???? ???? ???? c , supply current (ma) cc i 0 0 v cc , supply voltage (v) 10 20 30 40 5 10 15 20 25 ucx843b ucx842b ???? ???? c ?? ????? ????? ????? s pulsed load 120 hz rate v cc = 30 v c l = 15 pf t a = 25 c v cc = 15 v c l = 1.0 nf t a = 25 c 50 ns/div 100 ns/div 100 ma/div 20 v/div 90% 10% , output voltage o v , supply current cc i pin function description 8?pin 14?pin function description 1 1 compensation this pin is the error amplifier output and is made available for loop compensation. 2 3 voltage feedback this is the inverting input of the error amplifier. it is normally connected to the switching power supply output through a resistor divider. 3 5 current sense a voltage proportional to inductor current is connected to this input. the pwm uses this information to terminate the output switch conduction. 4 7 r t /c t the oscillator frequency and maximum output duty cycle are programmed by connecting resistor r t to v ref and capacitor c t to ground. operation to 500 khz is possible. 5 gnd this pin is the combined control circuitry and power ground. 6 10 output this output directly drives the gate of a power mosfet. peak currents up to 1.0 a are sourced and sunk by this pin. 7 12 v cc this pin is the positive supply of the control ic. 8 14 v ref this is the reference output. it provides charging current for capacitor c t through resistor r t . 8 power ground this pin is a separate power ground return that is connected back to the power source. it is used to reduce the effects of switching transient noise on the control circuitry. 11 v c the output high state (v oh ) is set by the voltage applied to this pin. with a separate power source connection, it can reduce the effects of switching transient noise on the control circuitry. 9 gnd this pin is the control circuitry ground return and is connected back to the power source ground. 2,4,6,1 3 nc no connection. these pins are not internally connected.
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 9 operating description the uc3842b, uc3843b series are high performance, fixed frequency, current mode controllers. they are specifically designed for off?line and dc?to?dc converter applications of fering the designer a cost?ef fective solution with minimal external components. a representative block diagram is shown in figure 18. oscillator the oscillator frequency is programmed by the values selected for the timing components r t and c t . capacitor c t is charged from the 5.0 v reference through resistor r t to approximately 2.8 v and discharged to 1.2 v by an internal current sink. during the discharge of c t , the oscillator generates an internal blanking pulse that holds the center input of the nor gate high. this causes the output to be in a low state, thus producing a controlled amount of output deadtime. figure 2 shows r t versus oscillator frequency and figure 3, output deadtime versus frequency, both for given values of c t . note that many values of r t and c t will give the same oscillator frequency but only one combination will yield a specific output deadtime at a given frequency. the oscillator thresholds are temperature compensated to within 6% at 50 khz. also because of industry trends moving the uc384x into higher and higher frequency applications, the uc384xb is guaranteed to within 10% at 250 khz. these internal circuit refinements minimize variations of oscillator frequency and maximum output duty cycle. the results are shown in figures 4 and 5. in many noise?sensitive applications it may be desirable to frequency?lock the converter to an external system clock. this can be accomplished by applying a clock signal to the circuit shown in figure 21. for reliable locking, the free?running oscillator frequency should be set about 10% less than the clock frequency. a method for multi?unit synchronization is shown in figure 22. by tailoring the clock waveform, accurate output duty cycle clamping can be achieved. error amplifier a fully compensated error amplifier with access to the inverting input and output is provided. it features a typical dc voltage gain of 90 db, and a unity gain bandwidth of 1.0 mhz with 57 degrees of phase margin (figure 8). the non?inverting input is internally biased at 2.5 v and is not pinned out. the converter output voltage is typically divided down and monitored by the inverting input. the maximum input bias current is ?2.0 a which can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. the error amp output (pin 1) is provided for external loop compensation (figure 32). the output voltage is of fset by two diode drops ( 1.4 v) and divided by three before it connects to the non?inverting input of the current sense comparator. this guarantees that no drive pulses appear at the output (pin 6) when pin 1 is at its lowest state (v ol ). this occurs when the power supply is operating and the load is removed, or at the beginning of a soft?start interval (figures 24, 25). the error amp minimum feedback resistance is limited by the amplifier?s source current (0.5 ma) and the required output voltage (v oh ) to reach the comparator?s 1.0 v clamp level: r f(min) 3.0 (1.0 v) + 1.4 v 0.5 ma = 8800 current sense comparator and pwm latch the uc3842b, uc3843b operate as a current mode controller, whereby output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the error amplifier output/compensation (pin 1). thus the error signal controls the peak inductor current on a cycle?by?cycle basis. the current sense comparator pwm latch configuration used ensures that only a single pulse appears at the output during any given oscillator cycle. the inductor current is converted to a voltage by inserting the ground?referenced sense resistor r s in series with the source of output switch q1. this voltage is monitored by the current sense input (pin 3) and compared to a level derived from the error amp output. the peak inductor current under normal operating conditions is controlled by the voltage at pin 1 where: i pk = v (pin 1) ? 1.4 v 3 r s abnormal operating conditions occur when the power supply output is overloaded or if output voltage sensing is lost. under these conditions, the current sense comparator threshold will be internally clamped to 1.0 v. therefore the maximum peak switch current is: i pk(max) = 1.0 v r s when designing a high power switching regulator it becomes desirable to reduce the internal clamp voltage in order to keep the power dissipation of r s to a reasonable level. a simple method to adjust this voltage is shown in figure 23. the two external diodes are used to compensate the internal diodes, yielding a constant clamp voltage over temperature. erratic operation due to noise pickup can result if there is an excessive reduction of the i pk(max) clamp voltage. a narrow spike on the leading edge of the current waveform can usually be observed and may cause the power supply to exhibit an instability when the output is lightly loaded. this spike is due to the power transformer interwinding capacitance and output rectifier recovery time. the addition of an rc filter on the current sense input with a time constant that approximates the spike duration will usually eliminate the instability (refer to figure 27).
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 10 + ? reference regulator v cc uvlo + ? v ref uvlo 3.6v 36v s r q internal bias + 1.0ma oscillator 2.5v r r r 2r error amplifier voltage feedback input output/ compensation current sense comparator 1.0v v cc 7(12) gnd 5(9) v c 7(11) output 6(10) power ground 5(8) current sense input 3(5) r s q1 v cc v in 1(1) 2(3) 4(7) 8(14) r t c t v ref = sink only positive true logic pin numbers adjacent to terminals are for the 8?pin dual?in?line package. pin numbers in parenthesis are for the d suffix soic?14 package. figure 18. representative block diagram figure 19. timing diagram large r t /small c t small r t /large c t pwm latch (see text) capacitor c t latch set" input output/ compensation current sense input latch reset" input output
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 11 undervoltage lockout two undervoltage lockout comparators have been incorporated to guarantee that the ic is fully functional before the output stage is enabled. the positive power supply terminal (v cc ) and the reference output (v ref ) are each monitored by separate comparators. each has built?in hysteresis to prevent erratic output behavior as their respective thresholds are crossed. the v cc comparator upper and lower thresholds are 16 v/10 v for the ucx842b, and 8.4 v/7.6 v for the ucx843b. the v ref comparator upper and lower thresholds are 3.6 v/3.4 v. the large hysteresis and low startup current of the ucx842b makes it ideally suited in off?line converter applications where efficient bootstrap startup techniques are required (figure 34). the ucx843b is intended for lower voltage dc?to?dc converter applications. a 36 v zener is connected as a shunt regulator from v cc to ground. its purpose is to protect the ic from excessive voltage that can occur during system startup. the minimum operating voltage (v cc ) for the ucx842b is 11 v and 8.2 v for the ucx843b. these devices contain a single totem pole output stage that was specifically designed for direct drive of power mosfets. it is capable of up to 1.0 a peak drive current and has a typical rise and fall time of 50 ns with a 1.0 nf load. additional internal circuitry has been added to keep the output in a sinking mode whenever an undervoltage lockout is active. this characteristic eliminates the need for an external pull?down resistor. the soic?14 surface mount package provides separate pins for v c (output supply) and power ground. proper implementation will significantly reduce the level of switching transient noise imposed on the control circuitry. this becomes particularly useful when reducing the i pk(max) clamp level. the separate v c supply input allows the designer added flexibility in tailoring the drive voltage independent of v cc . a zener clamp is typically connected to this input when driving power mosfets in systems where v cc is greater than 20 v. figure 26 shows proper power and control ground connections in a current?sensing power mosfet application. reference the 5.0 v bandgap reference is trimmed to 1.0% tolerance at t j = 25 c on the uc284xb, and 2.0% on the uc384xb. its primary purpose is to supply char ging current to the oscillator timing capacitor. the reference has short? circuit protection and is capable of providing in excess of 20 ma for powering additional control system circuitry. design considerations do not attempt to construct the converter on wire?wrap or plug?in pr ototype boards. high frequency circuit layout techniques are imperative to prevent pulse?width jitter. this is usually caused by excessive noise pick?up imposed on the current sense or v oltage feedback inputs. noise immunity can be improved by lowering circuit impedances at these points. the printed circuit layout should contain a ground plane with low?current signal and high?current switch and output grounds returning on separate paths back to the input filter capacitor. ceramic bypass capacitors (0.1 f) connected directly to v cc , v c , and v ref may be required depending upon circuit layout. this provides a low impedance path for filtering the high frequency noise. all high current loops should be kept as short as possible using heavy copper runs to minimize radiated emi. the error amp compensation circuitry and the converter output voltage divider should be located close to the ic and as far as possible from the power switch and other noise?generating components. current mode converters can exhibit subharmonic oscillations when operating at a duty cycle greater than 50% with continuous inductor current. this instability is independent of the regulator?s closed loop characteristics and is caused by the simultaneous operating conditions of fixed frequency and peak current detecting. figure 20a shows the phenomenon graphically. at t 0 , switch conduction begins, causing the inductor current to rise at a slope of m 1 . this slope is a function of the input voltage divided by the inductance. at t 1 , the current sense input reaches the threshold established by the control voltage. this causes the switch to turn off and the current to decay at a slope of m 2 , until the next oscillator cycle. the unstable condition can be shown if a perturbation is added to the control voltage, resulting in a small i (dashed line). with a fixed oscillator period, the current decay time is reduced, and the minimum current at switch turn?on (t 2 ) is increased by i + i m 2 /m 1 . the minimum current at the next cycle (t 3 ) decreases to ( i + i m 2 /m 1 ) (m 2 /m 1 ). this perturbation is multiplied by m 2 /m 1 on each succeeding cycle, alternately increasing and decreasing the inductor current at switch turn?on. several oscillator cycles may be required before the inductor current reaches zero causing the process to commence again. if m 2 /m 1 is greater than 1, the converter will be unstable. figure 20b shows that by adding an artificial ramp that is synchronized with the pwm clock to the control voltage, the i perturbation will decrease to zero on succeeding cycles. this compensating ramp (m 3 ) must have a slope equal to or slightly greater than m 2 /2 for stability. with m 2 /2 slope compensation, the average inductor current follows the control voltage, yielding true current mode operation. the compensating ramp can be derived from the oscillator and added to either the voltage feedback or current sense inputs (figure 33).
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 12 figure 20. continuous current waveforms 2(3) ea bias + osc r r r 2r 5(9) 1(1) 4(7) 8(14) r t c t v ref 0.01 the diode clamp is required if the sync amplitude is large enough to cause the bottom side of c t to go more than 300 mv below ground. external sync input 47 + r r r 2r bias osc ea 5(9) 1(1) 2(3) 4(7) 8(14) to additional ucx84xbs r s q 8 4 6 5 2 1 c 3 7 r a r b 5.0k 5.0k 5.0k mc1455 f 1.44 (r a 2r b )c d (max) r b r a 2r b + ? 5.0v ref + ? s r q bias + osc r r r 2r ea 1.0v 5(9) 7(11) 6(10) 5(8) 3(5) r s q1 v cc v in 1(1) 2(3) 4(7) 8(14) r 1 v clamp r 2 7(12) comp/latch 1.0 ma i pk(max) v clamp r s where: 0 v clamp 1.0 v v clamp 1.67 r 2 r 1 1 + 0.33x10 ?3 r 1 r 2 r 1 r 2 control voltage inductor current oscillator period control voltage inductor current oscillator period (a) (b) m 1 m 2 t 0 t 1 t 2 t 3 m 3 m 2 t 4 t 5 t 6 i m 1 i l l m 2 m 1 l l m 2 m 1 m 2 m 1 figure 21. external clock synchronization figure 22. external duty cycle clamp and multi?unit synchronization figure 23. adjustable reduction of clamp level
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 13 + ? + ? s r + r r r 2r v clamp 1.67 r 2 r 1 1 i pk(max) v clamp r s 5.0v ref q bias osc ea 1.0v 5(9) 7(11) 6(10) 5(8) 3(5) r s q1 v cc v in 1(1) 2(3) 4(7) 8(14) r 1 v clamp r 2 where: 0 v clamp 1.0 v c mpsa63 t soft-start in 1 v c 3v clamp c r 1 r 2 r 1 r 2 7(12) 1.0 ma comp/latch 5.0v ref + ? s r q bias + 1.0ma osc r r r 2r ea 1.0v 5(9) 1(1) 2(3) 4(7) 8(14) c 1.0m t soft?start 3600c in f figure 24. soft?start circuit figure 25. adjustable buffered reduction of clamp level with soft?start + ? 5.0v ref + ? s r q (11) (10) (8) comp/latch (5) r s 1/4 w v cc v in k m d sensefet g s power ground: to input source return control circuitry ground: to pin (9) virtually lossless current sensing can be achieved with the implementation of a sensefet power switch. for proper operation during over?current conditions, a reduction of the i pk(max) clamp level must be implemented. refer to figures 23 and 25. v pin 5 r s i pk r ds(on) r dm(on) r s if: sensefet = mtp10n10m r s = 200 then : v pin5 0.075i pk (12) figure 26. current sensing power mosfet + ? 5.0v ref + ? s r q 7(11) 6(10) 5(8) 3(5) r s q1 v cc v in c r the addition of the rc filter will eliminate instability caused by the leading edge spike on the current waveform. 7(12) comp/latch figure 27. current waveform spike suppression
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 14 figure 28. mosfet parasitic oscillations 6(10) 5(8) 3(5) r s q1 v in c1 base charge removal the totem pole output can furnish negative base current for enhanced transistor turn?off, with the addition of capacitor c 1 . s r 5.0v ref q 7(11) 6(10) 5(8) 3(5) r s q1 v cc i b + ? 0 v in isolation boundary v gs waveforms + ? 0 + ? 0 50% dc 25% dc i p k v (pin1) 1.4 3r s n s n p comp/latch 7(12) r c n s n p + ? + ? bias + osc r r r 2r ea 5(9) 1(1) 2(3) 4(7) 8(14) the mcr101 scr must be selected for a holding of < 0.5 ma @ t a(min) . the simple two transistor circuit can be used in place of the scr as shown. all resistors are 10 k. mcr 101 2n 3905 2n 3903 1.0 ma s r 5.0v ref q 7(11) 6(10) 5(8) 3(5) r s q1 v cc v in series gate resistor r g will damp any high frequency parasitic oscillations caused by the mosfet input capacitance and any series wiring inductance in the gate?source circuit. 7(12) r g comp/latch + ? + ? figure 29. bipolar transistor drive figure 30. isolated mosfet drive figure 31. latched shutdown
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 15 + ? + ? 5.0v ref 36v s r q bias + 1.0ma osc r r r 2r ea 1.0v 7(12) 7(11) 6(10) 5(8) 3(5) r s v cc v in 1(1) 2(3) 4(7) 8(14) r t c t the buffered oscillator ramp can be resistively summed with either the voltage feedback or current sense inputs to provide slope compensation. m ? 3.0m ?m r f c f r i r d from v o r slope mps3904 5(9) comp/latch figure 32. error amplifier compensation + r 2r 1.0ma ea 2(3) 5(9) 2.5v 1(1) r f c f r d r i from v o error amp compensation circuit for stabilizing any current mode topology except for boost and flyback converters operating with continuous inductor current. r f 8.8 k + r 2r 1.0ma ea 2(3) 5(9) 2.5v 1(1) r f c f r d r p from v o error amp compensation circuit for stabilizing current mode boost and flyback topologies operating with continuous inductor current. c p r i figure 33. slope compensation
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 16 figure 34. 27 w off?line flyback regulator mur110 + ? + ? s r + r r 5.0v ref q bias ea 5(9) 7(11) 6(10) 5(8) 3(5) 0.5 mtp 4n50 1(1) 2(3) 4(7) 8(14) 10k 4700pf 470pf 150k 100 pf 18k 4.7k 0.01 100 + 1.0k 115 vac 4.7 mda 202 250 56k 4.7k 3300 pf 1n4935 1n4935 ++ 68 47 1n4937 1n4937 680pf 2.7k l3 l2 l1 ++ ++ ++ 1000 1000 2200 10 10 1000 5.0v/4.0a 5.0v rtn 12v/0.3a 12v rtn ?12v/0.3a primary: 45 turns #26 awg secondary 12 v: 9 turns #30 awg (2 strands) bifiliar wound secondary 5.0 v: 4 turns (six strands) #26 hexfiliar wound secondary feedback: 10 turns #30 awg (2 strands) bifiliar wound core: ferroxcube ec35?3c8 bobbin: ferroxcube ec35pcb1 gap: 0.10" for a primary inductance of 1.0 mh mur110 mbr1635 t1 22 osc t1 ? 7(12) comp/latch l1 l2, l3 ? 15 h at 5.0 a, coilcraft z7156 ? 25 h at 5.0 a, coilcraft z7157 1n5819 test conditions results line regulation: 5.0 v 12 v v in = 95 to 130 vac = 50 mv or 0.5% = 24 mv or 0.1% load regulation: 5.0 v 12 v v in = 115 vac, i out = 1.0 a to 4.0 a v in = 115 vac, i out = 100 ma to 300 ma = 300 mv or 3.0% = 60 mv or 0.25% output ripple: 5.0 v 12 v v in = 115 vac 40 mv pp 80 mv pp efficiency v in = 115 vac 70% all outputs are at nominal load currents, unless otherwise noted
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 17 ordering information device operating temperature range package shipping ? uc2842bd t a = ?25 to +85 c soic?14 55 units/rail uc2842bdg soic?14 (pb?free) 55 units/rail uc2842bd1 soic?8 98 units/rail uc2842bd1g soic?8 (pb?free) 98 units/rail uc2842bd1r2 soic?8 2500 tape & reel uc2842bd1r2g soic?8 (pb?free) 2500 tape & reel uc2842bn pdip?8 1000 units/rail uc2842bng pdip?8 (pb?free) uc3842bn t a = 0 to +70 c pdip?8 uc3842bng pdip?8 (pb?free) uc3842bd soic?14 55 units/rail uc3842bdg soic?14 (pb?free) 55 units/rail uc3842bdr2 soic?14 2500 tape & reel uc3842bdr2g soic?14 (pb?free) 2500 tape & reel uc3842bd1 soic?8 98 units/rail uc3842bd1g soic?8 (pb?free) 98 units/rail uc3842bd1r2 soic?8 2500 tape & reel UC3842BD1R2G soic?8 (pb?free) uc3842bvdr2 t a = ?40 to +105 c soic?14 uc3842bvdr2g soic?14 (pb?free) uc3842bvd1 soic?8 98 units/rail uc3842bvd1g soic?8 (pb?free) 98 units/rail uc3842bvd1r2 soic?8 2500 tape & reel uc3842bvd1r2g soic?8 (pb?free) 2500 tape & reel uc2843bd t a = ?25 to +85 c soic?14 55 units/rail uc2843bdg soic?14 (pb?free) 55 units/rail uc2843bdr2 soic?14 2500 tape & reel uc2843bdr2g soic?14 (pb?free) 2500 tape & reel uc2843bd1 soic?8 98 units/rail uc2843bd1g soic?8 (pb?free) 98 units/rail uc2843bd1r2 t a = ?25 to +85 c soic?8 2500 tape & reel uc2843bd1r2g soic?8 (pb?free) 2500 tape & reel uc2843bn pdip?8 1000 units/rail uc2843bng pdip?8 (pb?free) 1000 units/rail ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 18 ordering information device operating temperature range package shipping ? uc3843bd t a = 0 to +70 c soic?14 55 units/rail uc3843bdg soic?14 (pb?free) 55 units/rail uc3843bdr2 soic?14 2500 tape & reel uc3843bdr2g soic?14 (pb?free) 2500 tape & reel uc3843bd1 soic?8 98 units/rail uc3843bd1g soic?8 (pb?free) 98 units/rail uc3843bd1r2 soic?8 2500 tape & reel uc3843bd1r2g soic?8 (pb?free) uc3843bdr2 soic?14 uc3843bdr2g soic?14 (pb?free) uc3843bn pdip?8 1000 units/rail uc3843bng pdip?8 (pb?free) 1000 units/rail uc3843bvd t a = ?40 to +105 c soic?14 55 units/rail uc3843bvdg soic?14 (pb?free) 55 units/rail uc3843bvdr2 soic?14 2500 tape & reel uc3843bvdr2g soic?14 (pb?free) 2500 tape & reel uc3843bvd1 soic?8 98 units/rail uc3843bvd1g soic?8 (pb?free) 98 units/rail uc3843bvd1r2 soic?8 2500 tape & reel uc3843bvd1r2g soic?8 (pb?free) 2500 tape & reel uc3843bvn pdip?8 1000 units/rail uc3843bvng pdip?8 (pb?free) 1000 units/rail ncv3843bvdr2 t a = ?40 to +125 c soic?14 2500 tape & reel ncv3843bvdr2g soic?14 (pb?free) 2500 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 19 soic?14 d suffix case 751a soic?8 d1 suffix case 751 marking diagrams pdip?8 n suffix case 626 *this marking diagram also applies to ncv3843bv. * x = 2 or 3 a = assembly location wl, l = wafer lot yy, y = year ww, w = work week g or = pb?free package uc3843bvn awl yywwg 1 8 uc384xbvdg awlyww 1 14 384xb alywv 1 8 uc384xbn awl yywwg 1 8 uc284xbn awl yywwg 1 8 uc384xbdg awlyww 1 14 uc284xbdg awlyww 1 14 384xb alyw 1 8 284xb alyw 1 8
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 20 package dimensions pdip?8 n suffix case 626?05 issue l notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 ?a? ?b? ?t? seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m ??? 10 ??? 10 n 0.76 1.01 0.030 0.040 soic?14 d suffix case 751a?03 issue g notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. ?a? ?b? g p 7 pl 14 8 7 1 m 0.25 (0.010) b m s b m 0.25 (0.010) a s t ?t? f r x 45 seating plane d 14 pl k c j m dim min max min max inches millimeters a 8.55 8.75 0.337 0.344 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.228 0.244 r 0.25 0.50 0.010 0.019
uc3842b, uc3843b, uc2842b, uc2843b, ncv3843bv http://onsemi.com 21 package dimensions soic?8 d1 suffix case 751?07 issue ag 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. uc3842b/d sensefet is a trademark of semiconductor components industries, llc. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5773?3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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